2nd Order Sigma Delta Modulator Design using Delta Sigma Toolbox

Authors

  • Nadeem Tariq Beigh Department of Electronics & Communication Engineering, Sharda University, Greater Noida, Uttar Pradesh, India
  • Prince Nagar Department of Electronics & Communication Engineering, Sharda University, Greater Noida, Uttar Pradesh, India
  • Aamir Bin Hamid Department of Electronics & Communication Engineering, Sharda University, Greater Noida, Uttar Pradesh, India
  • Faizan Tariq Beigh Department of Electronics & Communication Engineering, Islamic University, Pulwama, Jammu and Kashmir, India
  • Faroze Ahmad Department of Electronics & Communication Engineering, Islamic University, Pulwama, Jammu and Kashmir, India

DOI:

https://doi.org/10.51983/ajes-2018.7.2.2161

Keywords:

Sigma Delta, Delta sigma, Simulink, MATLAB, CMOS, ADC, EEG Sensor

Abstract

This paper discusses the block level design of 2nd order sigma delta using the Delta Sigma Toolbox and Simulink .An optimized modulator is designed with scaled coefficients, giving a low power, low frequency and high OSR modulator. The modulator presented has an OSR of 256, bandwidth of 200Hz, SNR of 100dB, SNDR of 96 dB, ENOB of 16 bits (approx.).The designed modulator is ideal for low power and low frequency applications, as in case of conversion of brain wave signals which are in the frequency range of 10-100Hz.This work provides the baseline for the design of the same modulator using switched capacitor in CMOS technology of 0.18μm TMSC CMOS technology with VDD of 1.8V.The coefficient values a, b, g, c are the ratios of capacitors in switched capacitor level design.

References

Y. S. Wang, Y. Q. Ru, Y. Liu, X. Zhou, S. Li, B. Cao, and X. W. Liu, "An Area-Efficient Multi-Bit Sigma-Delta Modulator," IEEE, vol. 19, no. 3, 2016.

P. C. C. de Aguirre, H. D. Klimach, and A. A. Susin, "A Third-Order 1 MHz Continuous-Time Sigma-Delta Modulator in a 130 nm CMOS Process," IEEE, 2015.

V. Artuhov and O. Brytov, "Analysis of Sigma-Delta Modulator with Distributed Feedback," in IEEE First Ukraine Conference on Electrical and Computer Engineering (UKRCON), 2017.

B. G and V. S. Nagaraja, "Design and Simulation of Sigma Delta Modulator using Switch Capacitor Architecture," International Research Journal of Engineering and Technology, vol. 03, no. 07, July 2016.

W. Bai, Y. Wang, and Z. Zhangming, "A 0.8-V 1.7-μW 25.9-fJ Continuous-Time Sigma-Delta Modulator for Biomedical Applications," IEEE, 2016.

F. Calderón-Preciado, F. Sandoval-Ibarra, and Silveira, "Synthesis and Design of a 4th Order Low-Pass DT Sigma-Delta Modulator in a 130nm CMOS process," IEEE, 2017.

M. Faghanil, M. Isa, M. N. Hamidon, and A. Mazaheri, "A comparison between two different FPGA-based topologies of first order sigma-delta modulator," in IEEE International Circuits and Systems Symposium, 2015.

A. Hussain et al., "Active–Passive SD Modulator for High-Resolution and Low-Power Applications," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016.

R. Kochan, T. Ganczarczyk, O. Kochan, and H. Klym, "Integral Nonlinearity of Third Order Single Bit Sigma-Delta Modulator," in 16th International Conference on Control, Automation and Systems, Korea, 2016.

B. Nowacki, N. Paulino, and J. Goes, "A Third-Order MASH SD Modulator Using Passive Integrators," IEEE Transactions on Circuits and Systems–I: Regular Papers, 2017.

F. M. Akcakaya and G. Dundar, "Low power 3rd order Feedforward Sigma Delta ADC Design," Turkish Journal of Electrical Engineering & Computer Sciences, vol. 25, pp. 155-162, 2017.

Downloads

Published

07-09-2018

How to Cite

Beigh, N. T., Prince Nagar, Hamid, A. B., Beigh, F. T. ., & Ahmad, F. . (2018). 2nd Order Sigma Delta Modulator Design using Delta Sigma Toolbox. Asian Journal of Electrical Sciences, 7(2), 41–45. https://doi.org/10.51983/ajes-2018.7.2.2161